M16C26 Datasheet, PDF (153/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev.
Specifications in this manual are
UART2 Special Mode Register 3
0.9
tentative
and
subject to change.
SINGLE-CHIP 16-BIT
M16C/26 Group
CMOS MICROCOMPUTER
UART2 Special Mode Register 3
Bit 1 of UART2 special mode register 3 (address 037516) are used to clock phase set bit. Figure1.15.9
shows UART2 special mode register 3.
When both the IIC mode select bit (bit 0 of UART2 special mode select register) and the IIC mode select
bit 2 (bit 0 of U2SMR2 register) are “1”, functions changed by these bits are shown in table 1.15.16 and
figure 1.15.30.
Bits 5 to 7 of UART2 special mode register 3 are SDA digital delay setting bits. By setting these bits, it is
possible to turn the SDA delay OFF or set the BRG count source delay to 2 to 8 cycles.
Table 1.15.16. Functions changed by clock phase set bits
Function
CKPH = 0, IICM = 1, IICM2 = 1 CKPH = 1, IICM = 1, IICM2 = 1
SCL initial and last value
Initial value = H, last value = L Initial value = L, last value = L
Transfer interrupt factor
Rising edge of 9th bit
Falling edge of 10th bit
Data transfer times from UART
receive shift register to receive Falling edge of 9th bit
buffer register
Two times :falling edge of 9th bit
and rising edge of 9th bit
(1) CKPH= "0" (IICM=1, IICM2=1)
SCL
SDA
D7 D6 D5 D4 D3 D2 D1 D0 D8
(Internal clock, transfer data 9 bits long and MSB first selected.)
Receive interrupt Transmit interrupt
Transfer to receive buffer
(2) CKPH= "1" (IICM=1, IICM2=1)
SCL
SDA
D7 D6 D5 D4 D3 D2 D1 D0 D8
(Internal clock, transfer data 9 bits long and MSB first selected.)
Receive interrupt
Transmit interrupt
Transfer to receive buffer
Figure 1.15.30. Functions changed by clock phase set bits
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