M16C26 Datasheet, PDF (66/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Interrupts
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
NMI Interrupt
If enabled, an NMI interrupt is generated when the input to the P85/NMI pin changes from “H” to “L”. The
NMI interrupt is a non-maskable external interrupt. The pin level can be checked in the port P85 register (bit
5 at address 03F016).
NMI is disabled by default after reset (the pin is a GPIO pin, P85) and can be enabled using bit 4 of
processor mode register 2. Once enabled, it can only be disabled by a reset signal.
Key Input Interrupt
If the direction register of any of P104 to P107 is set for input and a falling edge is input to that port, a key
input interrupt is generated. A key input interrupt can also be used as a key-on wakeup function for cancel-
ling the wait mode or stop mode. However, if you intend to use the key input interrupt, do not use P104 to
P107 as A-D input ports. Figure 1.9.11 shows the block diagram of the key input interrupt. Note that if an “L”
level is input to any pin that has not been disabled for input, inputs to the other pins are not detected as an
interrupt.
Pull-up
transistor
P107/KI3
P106/KI2
Pull-up
transistor
Pull-up
transistor
P105/KI1
P104/KI0
Pull-up
transistor
Port P104-P107 pull-up
select bit
Port P107 direction
register
Port P107 direction register
Port P106 direction
register
Port P105 direction
register
Port P104 direction
register
Figure 1.9.11. Block diagram of key input interrupt
Key input interrupt control register _{(address 004D16)}
Interrupt control circuit
Key input interrupt
request
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