M16C26 Datasheet, PDF (226/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Appendix Standard Serial I/O Mode 2 (Flash Memory Version)
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Appendix Standard Serial I/O Mode 2 (Flash Memory Version)
Overview of standard serial I/O mode 2 (clock asynchronized)
In standard serial I/O mode 2, software commands, addresses and data are input and output between the
microcomputer and peripheral units (serial programer, etc.) using 2-wire clock-asynchronized serial I/O
(UART1). Standard serial I/O mode 2 is engaged by releasing the reset with the P65 (CLK1) pin “L” level
and P86 (CE) pin and the CNVss pin are in “H” level).
The TxD1 pin is for CMOS output. Data transfer is in 8-bit units with LSB first, 1 stop bit and parity OFF.
After the reset is released, connections can be established at 9,600 bps when initial communications
(Figure 1.23.1) are made with a peripheral unit that requires a main clock with a minimum 2 MHz input
oscillation frequency. Baud rate can also be changed from 9,600 bps to 19,200, 38,400 or 57,600 bps by
executing software commands. However, if communication errors due to the oscillation frequency of the
main clock, change the main clock's oscillation frequency and the baud rate.
After executing commands from a peripheral unit that requires time, i.e. erase, or write (program) data,
allow sufficient time to pass or execute the read status command to check the device status, before execut-
ing the next command.
Data and status registers in memory can be read after transmitting software commands. Status, such as
the operating state of the flash memory or whether a program or erase operation ended successfully or not,
can be checked by reading the status register. The following describes the initial communications with
peripheral units, how frequency is identified, and software commands.
Initial communications with peripheral units
After the reset is released, the bit rate generator is adjusted to 9,600 bps to match the oscillation fre-
quency of the main clock, by sending the code as prescribed by the protocol for initial communications
with peripheral units (Figure 1.23.1).
(1) Transmit “B016” from a peripheral unit. If the oscillation frequency input by the main clock is 10 or 16
MHz, the microcomputer with internal flash memory outputs the “B016” check code. If the oscillation
frequency is anything other than 10 or 16 MHz, the microcomputer does not output anything.
(2) Transmit “0016” from a peripheral unit 16 times. (The microcomputer with internal flash memory sets the
bit rate generator so that “0016” can be successfully received.)
(3) The microcomputer with internal flash memory outputs the “B016” check code and initial communica-
tions end successfully *¹. Initial communications must be transmitted at a speed of 9,600 bps and a
transfer interval of a minimum 15 ms. Also, the baud rate at the end of initial communications is 9,600
bps.
*1. If the peripheral unit cannot receive “B016” successfully, change the oscillation frequency of the main clock.
Peripheral unit
Microcomputer with
internal flash memory
(1) Transfer "B016"
(2) Transfer "0016" 16 times
1st
At least 15ms
transfer interval
2nd
"B016"
"B016"
"0016"
"0016"
Reset
If the oscillation frequency input
by the main clock is 10 or 16 MHz,
the microcomputer outputs "B016".
If other than 10 or 16 MHz, the
microcomputer does not output
anything.
15 th
16th
"0016"
"0016"
"B016"
(3) Transfer check code "B016"
The bit rate generator setting completes (9600bps)
Figure 1.23.1. Peripheral unit and initial communication
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