M16C26 Datasheet, PDF (15/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
CPU
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change. _{M16C/26 Group}
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Central Processing Unit (CPU)
The CPU has a total of 13 registers shown in Figure 1.4.2. Seven of these registers (R0, R1, R2, R3, A0,
A1, and FB) come in two sets; therefore, these have two register banks.
b15
b8 7
R0^(Note)
H
b0
L
b15
b8 7
R1^(Note)
H
b0
L
b19
PC
b15
R2^(Note)
Data
registers
b0
b19
INTB H
L
b15
b0
R3^(Note)
b15
USP
b15
A0^(Note)
b15
A1^(Note)
b0
Address
b0
registers
b15
ISP
b15
SB
b15
FB^(Note)
b0
Frame base
registers
b15
FLG
b0
Program counter
b0
Interrupt table
register
b0
User stack pointer
b0
Interrupt stack
pointer
b0
Static base
register
b0
Flag register
Note: These registers consist of two register banks.
Figure 1.4.2. Central processing unit register
(1) Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)
Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer and
arithmetic/logic operations.
Registers R0 and R1 can each be used as dual 8-bit data registers. As such, their high-order bytes are
designated R0H/R1H, while their low-order bytes become R0L/R1L, respectively. In some instructions,
registers R2 and R0, as well as R3 and R1, can be combined to serve as 32-bit data registers (R2R0/R3R1).
(2) Address registers (A0 and A1)
Address registers (A0 and A1) consist of 16 bits each. Individually, they can be used for three types of
register-based addressing: register direct, address register indirect, and address register relative. They
are also used for transfer and arithmetic/logic operations, as well as three special instruction addressing
modes: address register relative with 20-bit displacement, 32-bit address register indirect, and 32-bit
register direct. These last two modes combine A0 and A1 for use as a single 32-bit register (A1A0).
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