M16C26 Datasheet, PDF (122/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Serial I/O
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
UART transmit/receive control register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UCON
Address
03B016
When reset
X00000002
Bit
symbol
U0IRS
Bit
name
UART0 transmit
interrupt cause select bit
U1IRS UART1 transmit
interrupt cause select bit
Function
(During clock synchronous
serial I/O mode)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
Function
(During UART mode)
RW
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
U0RRM UART0 continuous
receive mode enable bit
U1RRM UART1 continuous
receive mode enable bit
CLKMD0 CLK/CLKS select bit 0
CLKMD1 CLK/CLKS select
bit 1 (Note)
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enable
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enabled
Valid when bit 5 = 1
0 : Clock output to CLK1
1 : Clock output to CLKS1
0 : Normal mode
(CLK output is CLK1 only)
1 : Transfer clock output
from multiple pins
function selected
Must always be 0
Must always be 0
Invalid
Must always be 0
RCSP Separate CTS/RTS bit
0 : CTS/RTS shared pin
1 : CTS/ RTS separated
0 : CTS/RTS shared pin
1 : CTS/ RTS separated
Nothing is assigned.
In an attempt to write to this bit, write 0 . The value, if read, turns out to be indeterminate.
Note: When using multiple pins to output the transfer clock, the following requirements must be met:
* UART1 internal/external clock select bit (bit 3 at address 03A816) = 0 .
UART2 special mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2SMR
Address
037716
When reset
X00000002
Bit
symbol
Bit
name
IICM I²C mode select bit
Function
(During clock synchronous
serial I/O mode)
Function
(During UART mode)
0 : Normal mode
1 : I²C mode
Must always be 0
ABC Arbitration lost detecting 0 : Update per bit
flag control bit
1 : Update per byte
Must always be 0
BBS Bus busy flag
0 : STOP condition detected Must always be 0
1 : START condition detected
RW
(Note1)
(b3) ^{Reserved bit}
Must always be 0.
Must always be 0.
ABSCS ^{Bus collision detect}
sampling
clock select bit
Must always be 0
ACSE
Auto clear function
select bit of transmit
enable bit
SSS Transmit start condition
select bit
Must always be 0
Must always be 0
0 : Rising edge of transfer
clock
1 : Underflow signal of timer Aj
(Note 2)
0 : No auto clear function
1 : Auto clear at occurrence of
bus collision
0 : Ordinary
1 : Falling edge of RXDi
Nothing is assigned.
In an attempt to write to this bit, write 0 . The value, if read, turns out to be indeterminate.
Note 1: Nothing but 0 may be written.
Note 2: Underflow signal of timer A0 in UART2.
Figure 1.15.8. Serial I/O-related registers (5)
116
Renesas Technology Corp.