M16C26 Datasheet, PDF (22/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Reset
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Power supply detection register 1
b7 b6 b5 b4 b3 b2 b1 b0
0000 000
Symbol
VCR1
Address
001916
After reset
000010002
Bit symbol
Bit name
F unction
RW
Reserved bit
Set to “0”
RW
VC13
VDET4 power supply
0: VCC < VDET4
RO
monitor flag (Note)
1: VCC ≥ VDET4
Reserved bit
Set to “0”
RW
Note: The VC13 bit is useful when the VCR2 register's VC27 bit = 1 (VDET4 detection circuit enabled).
The VC13 bit is always 1 (VCC ≥ VDET4) when the VCR2 register's VC27 bit = 0 (VDET4 detection circuit disabled).
Power supply detection register 2 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
000000
Symbol
VCR2
Address
001A16
After reset
0016
Bit symbol
Bit name
Function
RW
Reserved bit
Set to “0”
RW
VC26
Power supply VDET3 monitor 0: Disables detection circuit
bit
1: Enables detection circuit
RW
VC27
Power supply VDET4 monitor 0: Disables detection circuit
bit (Note 2)
1: Enables detection circuit
RW
Note 1: Write to this register after the PRCR register’s PRC3 bit is set to “1” (write enabled).
Note 2: To use the VCR1 register’s VC13 bit or D4INT register’s D42 bit, set the VC27 bit to “1” (VDET4 detection circuit enabled).
Power supply VDET4 detection register (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
D4INT
Address
001F16
After reset
0016
Bit symbol
D40
D41
Bit name
VDET4 detection interrupt
enable bit.
STOP mode deactivation
control bit
(Note 4)
Function
RW
0 : Disable
1 : Enable
RW
0: Disable (do not use the VDET4
detection interrupt to get out
of stop mode)
1: Enable (use the VDET4
RW
detection interrupt to get out
of stop mode)
D42
VDET4 up/down detection flag 0: Not detected
(Note 2)
1: VDET4 up/down detected
RW
(Note
3)
D43
WDT overflow detected
flag
0: Not detected
1: Detected
RW
(Note
3)
DF0
Sampling clock select
bit
b5b4
00 : BCLK divided by 8
01 : BCLK divided by 16
RW
DF1
10 : BCLK divided by 32
11 : BCLK divided by 64
RW
(b7-b6)
Nothing is assigned. In an attempt to write to these bits, write
“0”. The value, if read, turns out to be “0”.
Note 1: Write to this register after the PRCR register’s PRC3 bit is set to “1” (write enabled).
Note 2: Useful when the VCR2 register's VC27 bit = 1 (VDET4 detection circuit enabled). If the VC27 bit is cleared
to 0 (VDET4 detection circuit disabled), the D42 bit is set to 0 (Not detected).
Note 3: This bit is cleared to “0” by writing a “0” in a program. (Writing a “1” has no effect.)
Note 4: If the VDET4 detection interrupt needs to be used to get out of stop mode again after once used for that
purpose, reset the D41 bit by writing a 0 and then a 1.
Figure 1.5.6. VCR1, VCR2, and D4INT registers
16
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