M16C26 Datasheet, PDF (60/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Interrupts
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Time (a) is dependent on the instruction under execution. Thirty cycles is the maximum required for the
DIVX instruction (without wait).
Time (b) is as shown in Table 1.9.5.
Table 1.9.5. Time required for executing the interrupt sequence
Interrupt vector address Stack pointer (SP) value
6-Bit bus, without wait
8-Bit bus, without wait
Even
Even
18 cycles (Note 1)
20 cycles (Note 1)
Even
Odd
19 cycles (Note 1)
20 cycles (Note 1)
Odd (Note 2)
Even
19 cycles (Note 1)
20 cycles (Note 1)
Odd (Note 2)
Odd
20 cycles (Note 1)
20 cycles (Note 1)
Note 1: Add 2 cycles in the case of a DBC interrupt; add 1 cycle in the case either of an address match
interrupt or of a single-step interrupt.
Note 2: Locate an interrupt vector address in an even address, if possible.
BCLK
Address bus
Data bus
R
W
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
Address
0000
Interrupt
information
Indeterminate
Indeterminate
Indeterminate
SP-2
SP-4
vec
vec+2
PC
SP-2
SP-4
vec
vec+2
contents contents contents contents
The indeterminate segment is dependent on the queue buffer.
If the queue buffer is ready to take an instruction, a read cycle occurs.
Figure 1.9.5. Time required for executing the interrupt sequence
Variation of IPL when Interrupt Request is Accepted
When a maskable interrupt request is accepted, the interrupt priority level of the accepted interrupt is set
in the IPL.
When a software interrupt or special interrupt request is accepted, one of the interrupt priority levels listed
in Table 1.9.6 is set in the IPL. Shown in Table 1.9.6 are the IPL values of software and special interrupts
when they are accepted.
Table 1.9.6. Relationship between interrupts without interrupt priority levels and IPL
Interrupt sources without priority levels
Level that is set to IPL
Watchdog timer, NMI, Oscillation stop and re-oscillation detection,
VDET4 detection
Software, address match, DBC, single-step
7
Not changed
54
Renesas Technology Corp.