M16C26 Datasheet, PDF (136/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative
Clock Asynchronous Serial I/O (UART) Mode
and
subject to change.
SINGLE-CHIP 16-BIT
M16C/26 Group
CMOS MICROCOMPUTER
Table 1.15.9 Registers used in UART mode and the register values set
Register
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
UiSMR
UiSMR2
UiSMR3
Bit
Function
0 to 8
Set transmission data (Note 1)
0 to 8
Reception data can be read (Note 1)
OER,FER,PER,SUM Error flag
---
Set a transfer rate
SMD2 to SMD0 Set these bits to ‘1002’ when transfer data is 7 bits long
Set these bits to ‘1012’ when transfer data is 8 bits long
Set these bits to ‘1102’ when transfer data is 9 bits long
CKDIR
Select the internal clock or external clock
STPS
Select the stop bit
PRY, PRYE
Select whether parity is included and whether odd or even
IOPOL
Select the TxD/RxD input/output polarity
CLK0, CLK1
Select the count source for the UiBRG register
CRS
Select CTS or RTS to use
TXEPT
Transmit register empty flag
CRD
Enable or disable the CTS or RTS function
NCH
Select TxDi pin output mode (Note 2)
CKPOL
Set to “0”
UFORM
LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to “0” when transfer data is 7 or 9 bits long.
TE
Set this bit to “1” to enable transmission
TI
Transmit buffer empty flag
RE
Set this bit to “1” to enable reception
RI
Reception complete flag
U2IRS (Note 2) Select the source of UART2 transmit interrupt
U2RRM (Note 2) Set to “0”
UiLCH
Set this bit to “1” to use inverted data logic
UiERE
Set to “0”
0 to 7
Set to “0”
0 to 7
Set to “0”
0 to 7
Set to “0”
UiSMR4
UCON
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
CLKMD0
CLKMD1
RCSP
7
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set to “0”
Invalid because CLKMD1 = 0
Set to “0”
Set this bit to “1” to accept as input the UART0 CTS0 signal from the P64 pin
Set to “0”
Note 1: The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long;
bit 0 to bit 7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
Note 2: Set the U0C1 and U1C1 registers bit 4 to bit 5 to “0”. The U0IRS, U1IRS, U0RRM and U1RRM bits
are included in the UCON register.
Note 3: TxD2 pin is N channel open-drain output. Set the U2C0 register's NCH bit to “0”.
i=0 to 2
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Renesas Technology Corp.