M16C26 Datasheet, PDF (61/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Interrupts
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Saving Registers
In the interrupt sequence, only the contents of the flag register (FLG) and that of the program counter
(PC) are saved in the stack area.
First, the processor saves the four higher-order bits of the program counter, and 4 upper-order bits and 8
lower-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 lower-order bits of the
program counter. Figure 1.9.6 shows the state of the stack as it was before the acceptance of the
interrupt request, and the state the stack after the acceptance of the interrupt request.
To save other necessary registers, use the PUSHM instruction to save these registers except the stack
pointer (SP)at the beginning of the interrupt routine.
Address
Stack area
MSB
LSB
m-4
m-3
m-2
m-1
m
Content of previous stack
m + 1 ^{Content of previous stack}
[SP]
Stack pointer
value before
interrupt occurs
Address
Stack area
MSB
LSB
m - 4 Program counter (PCL)
m - 3 Program counter (PCM)
m-2
Flag register (FLGL)
m-1
Flag register Program
(FLGH) counter (PCH)
m
Content of previous stack
[SP]
New stack
pointer value
m + 1 Content of previous stack
Stack status before interrupt request
is acknowledged
Stack status after interrupt request
is acknowledged
Figure 1.9.6. State of stack before and after acceptance of interrupt request
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