SDA9410-B13 Datasheet, PDF (64/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
S
M
Preliminary Data Sheet
Application modes and memory concept
M
S
SSC-Mode, AABB (A+B):
-master picure becomes smaller
-slave picture becomes larger
SSC-Mode: Double Window, AABB (A+B)
Figure 27 Changing picture sizes to get a double window display
Steps MEM-
OP
1
00
2
00
ORG-
MEMM
1
1
2a* 00
1
3
00
0
4
00
0
5
01
0
ORG-
MEMS
1
1
1
1
1
1
MEM-
WRM
0
0
0
0
0
1
MEM-
WRS
0
0
0
1
1
0
MEM-
RDS
0
0
0
0
1
X
MEM-
RDM
0
0
1
X
X
X
Operation
SRC mode with 1/9 PIP insertion
a field based up conversion mode
must be programmed by
STOPMOM and STOPMOS
only one field is read for master
channel (reduced vertical
resolution)
memory capacity of master
channel is reduced to 1 field
memory organization of slave
channel is prepared for SSC
configuration
slave channel reading is switched
to SSC memory configuration
SSC mode: full size master
picture, 1/9 size of slave picture
Table 56 Switching from SRC PIP mode to SSC mode
* Step 2a may be left out
64
Micronas