SDA9410-B13 Datasheet, PDF (144/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 31
Bit
Name
D7...D0 APPLIPS
Function
Number of active pixels per line in the input data stream in
system clocks of CLKS:
Active pixels = APPLIPS*8 [APPLIPS = 180]
Sub address 32
Bit
Name
D7...D0 ALPFIPS
Function
Number of active lines per field in the input data stream slave:
Active lines = ALPFIPS * 2 [ALPFIPS=144]
Sub address 33
Bit
Name
Function
D7...D2 VINDELS VINS input delay:
Delay(VINS to internal V-sync) = (128 * VINDELS + 1)*Tclks
[VINDELS = 0]
D1
VINPOLS VINS polarity:
1: low active
0: high active
D0
HINPOLS HINS polarity:
1: low active
0: high active
Sub address 34
Bit
Name
D7...D6 x
Function
xx
144
Micronas