SDA9410-B13 Datasheet, PDF (147/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 3C
Bit
Name
D7...D0 ^VERPOSM
Function
Number of lines from the first active line of the main channel to
the first active line of the master channel per output frame:
Number of lines = VERPOSM [VERPOSM = 0]
Sub address 3D
Bit
Name
Function
D7...D0 VERPOSS Number of lines from the first active line of the main channel to
the first active line of the slave channel per output frame:
Number of lines = VERPOSS [VERPOSS = 0]
Sub address 3E
Bit
Name
Function
D7
x
x
D6...D0 ^HORWIDTHM Number of active pixels per line of the master channel in
system clocks of X1/CLKD:
Active pixels = 8 * HORWIDTHM [HORWIDTHM = 90]
Sub address 3F
Bit
Name
Function
D7...D0 ^HORWIDTHS Number of active pixels per line of the slave channel in system
clocks of X1/CLKD:
Active pixels = 4 * HORWIDTHS [HORWIDTHS = 180]
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