SDA9410-B13 Datasheet, PDF (61/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Application modes and memory concept
This is the typical configuration needed for joint line free ’Split Screen’ / ’Double Window’
or ’PAP’ display in 4:1:1 or 4:2:0 format using AABB conversion. The same configuration
can be used for Multi Picture mode displaying a joint line free live picture and multiple
high resolution still pictures.
maximum picture size (master and slave) : 512 (768) pixel X 256 (170) lines
In MUP-Mode it is possible to write only A fields into the memory. Therefore the I²C Bus
parameters
WRFLDM and WRFLDS can be used.
WRFLDM /
WRFLDS
1
0
Write field
(MUP-Mode, MEMOP=10)
only A fields are written
all fields are written corresponding to the actual mode
Table 48 Definition of WRFLDM/WRFLDS
I²C Bus
parameter
[Default]
WRFLDM
[0]
WRFLDS
[0]
Sub address
Description
58h
Write field master channel (MUP-Mode)
57h
Write field slave channel (MUP-Mode)
Table 49 Input write I²C Bus parameter
5.6.5 Configuration switch
This chapter deals with the switching between the different operation modes without
causing visible picture artifacts. The typical application concerns the transition from
SRC-PIP mode to SSC double window mode (see figure 26 on page 63 and figure 27
on page 64) and furthermore to an exchange of master and slave channel (see figure
28 on page 65).
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Micronas