SDA9410-B13 Datasheet, PDF (33/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Input signal processing
5.4.2.1 Vertical compression and peaking
The overall reduction of the vertical compression block can be calculated by the formula:
Ε^---5^---1^----2^----+--5---I^-1-N^--2---T^----V^----M^------Φ D^-----E^-----Z1^----V^----M^---
The user must specify the vertical input picture size (defined by I²C Bus parameter
ALPFIPM/ALPFIPS) and the vertical output picture size (defined by I²C Bus parameter
APPLM/APPLS) as well as the I²C Bus parameter INTVM/INTVS (I²C Bus parameter,
09h,0Ah,2Bh,2Ch) and DEZVM/DEZVS (I²C Bus parameter, 0Ah,2Ch), which can be
calculated with the algorithm listed below (C-code).
intV, dezV: variables
for( intV=2*ALPFM/S, dezV=1; intV<=2*ALPFIPM/S; intV*=2, dezV*=2 )
;
intV = ((512*2*ALPFIPM/S*2+intV/2)/intV);
dezV/=2;
if(dezV>16)
{
intV=intV*dezV/16;
dezV=16;
}
INTVM/S=intV-512;
33
Micronas