SDA9410-B13 Datasheet, PDF (145/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 34
Bit
Name
D7...D1 NALIPS
D0
CHRFORS
Function
Number of not active lines per field in the input data stream
slave:
Not active lines = NALIPS+PD [NALIPS= 20]
Enables 16x9 format adjustment for PIP display
Chrominance format slave channel:
1: 4:2:0
0: 4:1:1
Sub address 35
Bit
Name
Function
D7...D0 HOUTDEL Horizontal delay of HOUT and VOUT signal in clocks of CLKD:
Delay = 4*HOUTDEL [HOUTDEL = 0]
Sub address 36
Bit
Name
D7...D0 NALOPD
Function
Number of not active lines per output frame in the output data
stream:
Not active lines = 2*(NALOPD+1) [NALOPD = 22]
Sub address 37
Bit
Name
Function
D7
x
D6...D0 ALPFOPD Number of active lines per output frame:
Active lines = 8 * ALPFOPD [ALPFOPD= 72]
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Micronas