SDA9410-B13 Datasheet, PDF (132/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 0C
Bit
Name
Function
D7...D0
NAPIPDLM _{Number of not active pixels from HINM to the input data in}
(MSBs of _{system clocks of CLKM:}
NAPLIPM) _{Distance(HINM to input data) = (4 * NAPIPDLM + NAPIPPHM}
+ 8) [NAPIPDLM= 0]
Sub address 0D
Bit
Name
D7...D0 ALPFM
Function
Number of active lines per field after vertical compression
master:
Active lines = ALPFM * 2 [ALPFM=144]
Sub address 0E
Bit
Name
D7...D0 APPLM
Function
Number of active pixels per line in the input data stream after
horizontal expansion/compression in system clocks of CLKM:
Active pixels = APPLM*8 [APPLM = 180]
Sub address 0F
Bit
Name
D7...D0 APPLIPM
Function
Number of active pixels per line in the input data stream in
system clocks of CLKM:
Active pixels = APPLIPM*8 [APPLIPM = 180]
132
Micronas