SDA9410-B13 Datasheet, PDF (35/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Input signal processing
I²C Bus parameter
YPEAKM/YPEAKS
CPEAKM/CPEAKS
0 (minimum value)
peaking off
peaking off
3 (maximum value)
maximum peaking factor
maximum peaking factor
Table 13 Input write I²C Bus parameter YPEAKM/YPEAKS/CPEAKM/CPEAKS
I²C Bus
parameter
INTVM
DEZVM
INTVS
DEZVS
YPEAKM
CPEAKM
YPEAKS
CPEAKS
ALPFM
ALPFS
CHFILM
CHFILS
Sub address
09h,0Ah
0Ah
2Bh,2Ch
2Ch
0Ah
0Ah
2Ch
2Ch
0Dh
2Fh
03h
25h
Description
Interpolation factor for vertical compression master
Decimation factor for vertical compression master
Interpolation factor for vertical compression slave
Decimation factor for vertical compression master
Vertical peaking factor for luminance signal master
Vertical peaking factor for chrominance signal master
Vertical peaking factor for luminance signal slave
Vertical peaking factor for chrominance signal slave
Number of active lines per field after vertical compression
master
Number of active lines per field after vertical compression
slave
Chrominance filter master channel on/off
Chrominance filter slave channel on/off
Table 14 Input write I²C Bus parameter
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