SDA9410-B13 Datasheet, PDF (143/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
D2...D1
D0
NAPIPPHS
(LSBs of
NAPLIPS)
Number of not active pixels from external HINS to the input data
in system clocks of CLKS:
Distance(HINS to input data) = (NAPIPDLS*4+NAPIPPHS+8)
[NAPIPPHS = 0]
TWOINS
Chrominance input format slave:
1: 2’s complement input (-128...127)
0: unsigned input (0...255)
inside the SDA 9410 the data are always processed as
unsigned data
Sub address 2E
Bit
Name
Function
D7...D0
NAPIPDLS
(MSBs of
NAPLIPS)
Number of not active pixels from HINS to the input data in
system clocks of CLKS:
Distance(HINS to input data) = (4 * NAPIPDLS + NAPIPPHS +
8) [NAPIPDLS= 0]
Sub address 2F
Bit
Name
D7...D0 ALPFS
Function
Number of active lines per field after vertical compression slave:
Active lines = ALPFS * 2 [ALPFS=144]
Sub address 30
Bit
Name
D7...D0 APPLS
Function
Number of active pixels per line in the input data stream after
horizontal expansion/compression in system clocks of CLKS:
Active pixels = APPLS*8 [APPLS = 180]
143
Micronas