SDA9410-B13 Datasheet, PDF (116/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Display processing
5.12.5 Coarse delay
Before Digital-to-Analog conversion an adjustment of the phase of the luminance signal
can be performed (I²C Bus parameter COARSDEL, 5Ch). The delay of the luminance
can be varied by periods (-8, ...[1]... , +7) of the DAC clock (2*CLKD). This can be used
to compensate different delay times of external analog filters.
I²C Bus
parameter
COARSDEL
Sub address
5Ch
Description
Delay of the luminance signal in relation to the chrominance signal
in 2*CLKD clocks
Table 99 Output write I²C Bus parameter
5.12.6 Digital-to-Analog conversion
Three 9-bit Digital-to-Analog converters are implemented. The DACs are short-circuit
protected converters with current outputs. The full range output current of the IY_O,
IU_O, IV_O channels (I_OFR) is determined by the current I_REF at the pin RREF_I by I_OFR
~ 10 I_REF . The voltage at the pin RREF_I is generated via pin UREF_I by an internal
operational amplifier and follows the voltage at the pin UREF_I. Thus I_REF is given by I_REF
~ V_UREF/R_REF where R_REF is a resistor between RREF_I and analog ground. Another way
to define I_REF is the application of a current sink at the RREF_I point. For recommended
values of V_UREF and I_REF compare "Operating range" on page 171. For applications
with lower requirements there is still another way to define I_OFR: Connect pin UREF_I to
the positive supply and apply a resistor against ground. Since in this operation mode the
internal reference amplifier reaches saturation, the exact value of I_REF is not exactly
predictable.
I²C Bus
parameter
CHROM_AMP
Sub address
5Eh
Description
Chrominance amplification factor adjustment for DAC output
1: amplification factor 2
0: amplification factor 1
Table 100 Output write I²C Bus parameter
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