SDA9410-B13 Datasheet, PDF (59/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Application modes and memory concept
Config.
1
2
3
4
5
6
7
8
9
10
11
12
Master Channel
Size [Pixel X Lines]
MEMWRM=0
768 X 288
768 X 341
768 X 288
768 X 341
512 X 256
512 X 256
512 X 512
512 X 512
512 X 256
512 X 256
512 X 512
512 X 512
MEMWRM=1
768 X 170
768 X 170
768 X 341
768 X 341
768 X 170
768 X 170
768 X 341
768 X 341
Table 44 Maximum picture sizes
Slave Channel
Size [Pixel X Lines]
MEMWRS=0
MEMWRS=1
256 X 104
not available
256 X 104 / 512 X 176
768 X 341
512 X 256
768 X 170
512 X 512
768 X 341
512 X 256
512 X 512
768 X 170
768 X 341
512 X 256
512 X 512
768 X 170
768 X 341
512 X 256
768 X 170
512 X 512
768 X 341
MEMWRS
1
0
Memory write mode slave channel
max. 768 pixel/line
max. 512 pixel/line
Table 45 Definition of MEMWRS
MEMWRM
1
0
Memory write mode master channel
(ORGMEM=01 or 10, SSC or MUP Mode)
max. 768 pixel/line
max. 512 pixel/line
Table 46 Definition of MEMWRM
59
Micronas