SDA9410-B13 Datasheet, PDF (150/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 47
Bit
Name
D7
D6...D0 VERINT
Function
x
Vertical expansion factor:
127: no vertical expansion
:
85: vertical expansion with factor 1.5
:
63: vertical expansion with factor 2
:
Sub address 48
Bit
Name
D7...D5 x
D4...D1 ^STOPMOM
D0
RMODE
Function
xxx
Static operation mode for master channel [STOPMOM = 0]
Raster mode:
1: progressive
0: interlaced
Sub address 49
Bit
Name
Function
D7...D4 INTMODE Free programmable INTERLACED signal for AC coupled
deflections [INTMODE = 0]
D3
BLANKPOL _{BLANK polarity:}
1: low active
0: high active
D2...D0 ^ADOPMOM Adaptive operation mode of master channel [ADOPMOM=0]
150
Micronas