SDA9410-B13 Datasheet, PDF (63/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Application modes and memory concept
MEMWRM
0
1
Memory read mode master channel
(only for SSC- and MUP-mode)
512 pixel / line
768 pixel / line
Table 54 Definition of MEMWRM
MEMWRS
0
1
Memory read mode slave channel
SRC-mode: writing data in PIP configuration
SSC- and MUP-mode: 512 pixel / line
SRC-mode: writing data in PIP- and in SSC configuration
SSC- and MUP-mode: 768 pixel / line
Table 55 Definition of MEMWRS
A typical animated transition to a double window display can be divided into two parts:
changing the operation mode from SRC to SSC (figure 26 on page 63) and changing the
picture sizes and positions continuously according to a double window display (figure
27 on page 64). In SSC mode no vector driven up conversion modes are possible. Only
field based algorithms are supported. The corresponding I²C commands are
summarized in Table 56 and Table 57.
M
M
S
S
SRC-PIP Mode, ABAB (A+B)
SSC-Mode, AABB (A+B)
Figure 26 Switching from SRC-PIP mode to SSC mode
63
Micronas