SDA9410-B13 Datasheet, PDF (130/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Sub address 08
Bit
Name
D2...D0 DEZHM
I²C Bus
Function
Decimation factor for horizontal compression/expansion
master:
111: Factor 16
110: Factor 8
101: Factor 4
100: Factor 2
011: not defined
010: not defined
001: Factor 1
000: Bypass
Sub address 09
Bit
Name
D7...D0 INTVM
Function
Interpolation factor for vertical compression master:
INTVM+512
[INTVM(8...1)=0]
Sub address 0A
Bit
Name
D7
INTVM
D6...D4 DEZVM
Function
Interpolation factor for vertical compression master:
INTVM+512
[INTVM(0)=0]
Decimation factor for vertical compression master:
111: Factor 16
110: Factor 8
101: Factor 4
100: Factor 2
011: not defined
010: not defined
001: Factor 1
000: Bypass
130
Micronas