SDA9410-B13 Datasheet, PDF (18/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Pin Description
Table 1
Pin definitions and functions (continued)
Symbol
Pin
Num.
Input Function
Outp.
INTERLACED 6
O/TTL Interlace signal for AC coupled vertical deflection
CLKM
18
I/TTL
System clock master channel
CLKS
58
I/TTL
System clock slave channel
X1 / CLKD
2
I/TTL
Crystal connection / System clock display channel
X2
1
O/ANA Crystal connection
CLK-OUT
3
TEST
82
IY_O
87
IYQ_O
86
VDDY
88
IU_O
84
IUQ_O
83
VDDU
85
IV_O
90
IVQ_O
89
VDDV
91
UREF_I
94
O/TTL
I/TTL
O/ANA
O/ANA
S
O/ANA
O/ANA
S
O/ANA
O/ANA
S
I/ANA
System clock output
Test input, connect to V_SS for normal operation
Analog luminance output Y
Differential analog Y output, connect to V_SS for normal operation
Supply voltage for analog parts DAC ( V_DD = 3.3 V )
Analog luminance output U
Differential analog U output, connect to V_SS for normal operation
Supply voltage for analog parts DAC ( V_DD = 3.3 V )
Analog luminance output V
Differential analog V output, connect to V_SS for normal operation
Supply voltage for analog parts DAC ( V_DD = 3.3 V )
Analog reference voltage for DACs
RREF_I
93
Reference resistor for DACs
S: supply, I: input, O: output, TTL: digital (TTL)
ANA: analog
PD: pull down (switched on or off depending on I²C bus parameter FORMATM,
FORMATS or SLAVECON)
*) x - placeholder for number
18
Micronas