SDA9410-B13 Datasheet, PDF (23/179 Pages) Micronas – Display Processor and Scan Rate Converter using Embedded DRAM Technology Units

SDA9410
Preliminary Data Sheet
Input sync controller (ISCM/ISCS)
I²C Bus parameter
[Default value]
NALIPM
[20]
NALIPS
[20]
ALPFIPM
[144]
ALPFIPS
[144]
NAPLIPM
NAPIPDLM
[0]
NAPIPPHM
[0]
NAPLIPS
NAPIPDLS
[0]
NAPIPPHS
[0]
APPLIPM
[180]
APPLIPS
[180]
Sub address
12h
34h
10h
32h
03h, 0Ch
2Dh, 2Eh
0Fh
31h
Description
Not Active Line InPut Master defines the number of lines from
the V-Sync to the first active line of the field
Not Active Line InPut Slave defines the number of lines from
the V-Sync to the first active line of the field
Active Lines Per Field InPut Master defines the number of
active lines
Active Lines Per Field InPut Slave defines the number of active
lines
Not Active Pixels Per Line InPut Master defines the number of
pixels from the H-Sync to the first active pixel of the line. The
number of pixels is a combination of NAPIPDLM and
NAPIPPHM.
Not Active Pixels Per Line InPut defines the number of pixels
from the H-Sync to the first active pixel of the line. The number
of pixels is a combination of NAPIPDLS and NAPIPPHS.
Active Pixels Per Line InPut Master defines the number of
active pixels
Active Pixels Per Line InPut Slave defines the number of active
pixels
Table 3
Input write I²C Bus parameter
Inside of the SDA 9410 a field detection block is necessary for the detection of an odd
(A) or even (B) field. Therefore the incoming H-Sync H1 (delayed HINM/HINS signal,
delay depends on NAPIPDLM/NAPIPDLS and NAPIPPHM/NAPIPPHS) is doubled (H2
signal). Depending on the phase position of the rising edge of the VINM/VINS signal an
A (rising edge between H1 and H2) or B (rising edge between H2 and H1) field is
detected. For proper operation of the field detection block, the VINM/VINS must be
delayed depending on the delay of the HINM/HINS signal (H1). The figure below
explains the field detection process and the functionality of the VINDELM/VINDELS I²C
Bus parameter (inside the SDA 9410 the delayed VINM/VINS signal is called Vd and the
detected field signal is called Ffd).
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Micronas