PIC16F707 Datasheet, PDF (56/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
REGISTER 6-5: PORTB: PORTB REGISTER
R/W-x
RB7
bit 7
R/W-x
RB6
R/W-x
RB5
R/W-x
RB4
R/W-x
RB3
R/W-x
RB2
R/W-x
RB1
R/W-x
RB0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
RB<7:0>: PORTB I/O Pin bit
1 = Port pin is > VIH
0 = Port pin is < VIL
REGISTER 6-6: TRISB: PORTB TRI-STATE REGISTER
R/W-1
TRISB7
bit 7
R/W-1
TRISB6
R/W-1
TRISB5
R/W-1
TRISB4
R/W-1
TRISB3
R/W-1
TRISB2
R/W-1
TRISB1
R/W-1
TRISB0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
TRISB<7:0>: PORTB Tri-State Control bit
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
REGISTER 6-7: WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1
WPUB7
bit 7
R/W-1
WPUB6
R/W-1
WPUB5
R/W-1
WPUB4
R/W-1
WPUB3
R/W-1
WPUB2
R/W-1
WPUB1
R/W-1
WPUB0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
Note 1:
2:
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Global RBPU bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
DS41418A-page 56
Preliminary
 2010 Microchip Technology Inc.