PIC16F707 Datasheet, PDF (38/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
TABLE 3-5: INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)
Register
Address
Power-on Reset/
Brown-out Reset⁽¹⁾
MCLR Reset/
WDT Reset
Wake-up from Sleep through
Interrupt/Time-out
TBCON
111h
0-00 0000
0-00 0000
u-uu uuuu
TMRB
112h
0000 0000
0000 0000
uuuu uuuu
DACCON0
113h
000- 00--
000- 00--
uuu- uu--
DACCON1
114h
---0 0000
---0 0000
---u uuuu
ANSELA
185h
1111 1111
1111 1111
uuuu uuuu
ANSELB
186h
1111 1111
1111 1111
uuuu uuuu
ANSELC
187h
1111 1111
1111 1111
uuuu uuuu
ANSELD
188h
1111 1111
1111 1111
uuuu uuuu
ANSELE
189h
---- -111
---- -111
---- -uuu
PMCON1
18Ch
1--- ---0
1--- ---0
u--- ---u
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 and PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 3-2 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
TABLE 3-6: SUMMARY OF REGISTERS ASSOCIATED WITH RESETS
Name
Bit 7 Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets⁽¹⁾
STATUS
PCON
Legend:
Note 1:
IRP RP1 RP0
TO
PD
Z
DC
C 0001 1xxx 000q quuu
—
—
—
—
—
— POR BOR ---- --qq ---- --uu
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are
not used by Resets.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
DS41418A-page 38
Preliminary
 2010 Microchip Technology Inc.