PIC16F707 Datasheet, PDF (29/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
3.0 RESETS
The PIC16F707/PIC16LF707 differentiates between
various kinds of Reset:
a) Power-on Reset (POR)
b) WDT Reset during normal operation
c) WDT Reset during Sleep
d) MCLR Reset during normal operation
e) MCLR Reset during Sleep
f) Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset (POR)
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-3.
These bits are used in software to determine the nature
of the Reset.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 3-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 25.0 “Electrical
Specifications” for pulse width specifications.
FIGURE 3-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
MCLRE
MCLR/VPP
VDD
WDT
Module
Sleep
WDT
Time-out
Reset
POR
Brown-out⁽¹⁾
Reset
Power-on Reset
BOREN
OSC1/
CLKIN
OST/PWRT
OST
10-bit Ripple Counter
PWRT
WDTOSC
11-bit Ripple Counter
Chip_Reset
Note 1: Refer to the Configuration Word Register 1 (Register 8-1).
Enable PWRT
Enable OST
 2010 Microchip Technology Inc.
Preliminary
DS41418A-page 29