PIC16F707 Datasheet, PDF (33/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
3.5 Brown-Out Reset (BOR)
Brown-out Reset is enabled by programming the
BOREN<1:0> bits in the Configuration register. The
brown-out trip point is selectable from two trip points
via the BORV bit in the Configuration register.
Between the POR and BOR, complete voltage range
coverage for execution protection can be imple-
mented.
Two bits are used to enable the BOR. When
BOREN = 11, the BOR is always enabled. When
BOREN = 10, the BOR is enabled, but disabled during
Sleep. When BOREN = 0X, the BOR is disabled.
If VDD falls below VBOR for greater than parameter
(TBOR) (see Section 25.0 “Electrical Specifica-
tions”), the brown-out situation will reset the device.
This will occur regardless of VDD slew rate. A Reset is
not ensured to occur if VDD falls below VBOR for more
than parameter (TBOR).
If VDD drops below VBOR while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once VDD
rises above VBOR, the Power-up Timer will execute a
64 ms Reset.
Note:
When erasing Flash program memory, the
BOR is forced to enabled at the minimum
BOR setting to ensure that any code
protection circuitry is operating properly.
FIGURE 3-4:
BROWN-OUT SITUATIONS
VDD
VBOR
Internal
Reset
64 ms⁽¹⁾
VDD
VBOR
Internal
Reset
< 64 ms
64 ms⁽¹⁾
VDD
Internal
Reset
64 ms⁽¹⁾
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
VBOR
 2010 Microchip Technology Inc.
Preliminary
DS41418A-page 33