PIC16F707 Datasheet, PDF (37/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
TABLE 3-5: INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)
Register
Address
Power-on Reset/
Brown-out Reset⁽¹⁾
MCLR Reset/
WDT Reset
Wake-up from Sleep through
Interrupt/Time-out
ADCON0
1Fh
--00 0000
--00 0000
--uu uuuu
OPTION_REG 81h/181h
1111 1111
1111 1111
uuuu uuuu
TRISA
85h
1111 1111
1111 1111
uuuu uuuu
TRISB
86h
1111 1111
1111 1111
uuuu uuuu
TRISC
87h
1111 1111
1111 1111
uuuu uuuu
TRISD
88h
1111 1111
1111 1111
uuuu uuuu
TRISE
89h
---- 1111
---- 1111
---- uuuu
PIE1
8Ch
0000 0000
0000 0000
uuuu uuuu
PIE2
PCON
8Dh
0000 ---0
8Eh
---- --qq
0000 ---0
---- --uu^(1,5)
uuuu ---u
---- --uu
T1GCON
8Fh
0000 0x00
uuuu uxuu
uuuu uxuu
OSCCON
90h
--10 qq--
--10 qq--
--uu qq--
OSCTUNE
91h
--00 0000
--uu uuuu
--uu uuuu
PR2
92h
1111 1111
1111 1111
uuuu uuuu
SSPADD
93h
0000 0000
0000 0000
uuuu uuuu
SSPMSK
93h
1111 1111
1111 1111
uuuu uuuu
SSPSTAT
94h
0000 0000
0000 0000
uuuu uuuu
WPUB
95h
1111 1111
1111 1111
uuuu uuuu
IOCB
96h
0000 0000
0000 0000
uuuu uuuu
T3CON
97h
0000 -0-0
0000 -0-0
uuuu -u-u
TXSTA
98h
0000 -010
0000 -010
uuuu -uuu
SPBRG
99h
0000 0000
0000 0000
uuuu uuuu
TMR3L
9Ah
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR3H
9Bh
xxxx xxxx
uuuu uuuu
uuuu uuuu
APFCON
9Ch
---- --00
---- --00
---- --uu
FVRCON
9Dh
q000 0000
q000 0000
q000 0000
ADCON1
9Fh
-000 --00
-000 --00
-uuu --uu
TACON
105h
0-00 0000
0-00 0000
u-uu uuuu
CPSBCON0
106h
00-- 0000
00-- 0000
uu-- uuuu
CPSBCON1
107h
---- 0000
---- 0000
---- uuuu
CPSACON0
108h
00-- 0000
00-- 0000
uu-- uuuu
CPSACON1
109h
---- 0000
---- 0000
---- uuuu
PMDATL
10Ch
xxxx xxxx
xxxx xxxx
uuuu uuuu
PMADRL
10Dh
xxxx xxxx
xxxx xxxx
uuuu uuuu
PMDATH
10Eh
--xx xxxx
--xx xxxx
--uu uuuu
PMADRH
10Fh
---x xxxx
---x xxxx
---u uuuu
TMRA
110h
0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 and PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 3-2 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
 2010 Microchip Technology Inc.
Preliminary
DS41418A-page 37