PIC16F707 Datasheet, PDF (137/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
18.0 ADDRESSABLE UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (AUSART)
The Addressable Universal Synchronous
Asynchronous Receiver Transmitter (AUSART)
module is a serial I/O communications peripheral. It
contains all the clock generators, shift registers and
data buffers necessary to perform an input or output
serial data transfer independent of device program
execution. The AUSART, also known as a Serial
Communications Interface (SCI), can be configured as
a full-duplex asynchronous system or half-duplex
synchronous system. Full-Duplex mode is useful for
communications with peripheral systems, such as CRT
terminals and personal computers. Half-Duplex
Synchronous mode is intended for communications
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs or other microcontrollers.
These devices typically do not have internal clocks for
baud rate generation and require the external clock
signal provided by a master synchronous device.
The AUSART module includes the following capabilities:
• Full-duplex asynchronous transmit and receive
• Two-character input buffer
• One-character output buffer
• Programmable 8-bit or 9-bit character length
• Address detection in 9-bit mode
• Input buffer overrun error detection
• Received character framing error detection
• Half-duplex synchronous master
• Half-duplex synchronous slave
• Sleep operation
Block diagrams of the AUSART transmitter and
receiver are shown in Figure 18-1 and Figure 18-2.
FIGURE 18-1:
AUSART TRANSMIT BLOCK DIAGRAM
Data Bus
TXREG Register
MSb
8
LSb
(8)
•••
0
Transmit Shift Register (TSR)
TXIE
TXIF
Pin Buffer
and Control
Interrupt
TX/CK
TXEN
Baud Rate Generator
+1
SPBRG
FOSC
÷n
Multiplier
SYNC
BRGH
n
x4 x16 x64
100
x10
TX9
TX9D
TRMT
SPEN
 2010 Microchip Technology Inc.
Preliminary
DS41418A-page 137