PIC16F707 Datasheet, PDF (279/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
Operation .................................................... 96, 101, 112
Specifications............................................................ 219
Timer1 ................................................................................. 99
Asynchronous Counter Mode ................................... 102
Reading and Writing ......................................... 102
Modes of Operation .................................................. 101
Oscillator ................................................................... 102
Prescaler................................................................... 102
Specifications............................................................ 219
TMR1H Register ......................................................... 99
TMR1L Register.......................................................... 99
Timer2
Associated registers.................................................. 116
Timers
Timer2
T2CON.............................................................. 116
Timing Diagrams
A/D Conversion......................................................... 221
A/D Conversion (Sleep Mode) .................................. 222
Asynchronous Reception .......................................... 144
Asynchronous Transmission..................................... 140
Asynchronous Transmission (Back-to-Back) ............ 140
Brown-out Reset (BOR) ............................................ 217
Brown-out Reset Situations ........................................ 33
CLKOUT and I/O....................................................... 215
Clock Synchronization .............................................. 175
Clock Timing ............................................................. 212
Enhanced Capture/Compare/PWM (ECCP) ............. 220
I²C Bus Data ............................................................. 227
I²C Bus Start/Stop Bits.............................................. 226
I²C Reception (7-bit Address) ................................... 170
I²C Slave Mode with SEN = 0 (Reception,
10-bit Address) ................................................. 171
I²C Transmission (7-bit Address).............................. 172
INT Pin Interrupt.......................................................... 40
Reset, WDT, OST and Power-up Timer ................... 217
Slave Select Synchronization ................................... 163
SPI Master Mode ...................................................... 160
SPI Master Mode (CKE = 1, SMP = 1) ..................... 224
SPI Mode (Slave Mode with CKE = 0) ...................... 162
SPI Mode (Slave Mode with CKE = 1) ...................... 162
SPI Slave Mode (CKE = 0) ....................................... 224
SPI Slave Mode (CKE = 1) ....................................... 225
Synchronous Reception (Master Mode, SREN) ....... 153
Synchronous Transmission....................................... 151
Synchronous Transmission (Through TXEN) ........... 151
Time-out Sequence
Case 1 ................................................................ 34
Case 2 ................................................................ 35
Case 3 ................................................................ 35
Timer0 and Timer1 External Clock ........................... 219
USART Synchronous Receive (Master/Slave) ......... 223
USART Synchronous Transmission (Master/Slave) . 222
Wake-up from Interrupt ............................................. 184
Timing Parameter Symbology........................................... 211
Timing Requirements
I²C Bus Data ............................................................. 228
I2C Bus Start/Stop Bits ............................................. 227
SPI Mode .................................................................. 226
TMR0 Register .................................................................... 19
TMR1H Register ........................................................... 19, 20
TMR1L Register ............................................................ 19, 20
TMR2 Register .................................................................... 19
TMRO Register ................................................................... 21
TRISA ................................................................................. 52
TRISA Register............................................................. 20, 52
TRISB ................................................................................. 55
TRISB Register............................................................. 20, 56
TRISC ................................................................................. 59
TRISC Register............................................................. 20, 59
TRISD ................................................................................. 62
TRISD Register............................................................. 20, 63
TRISE ................................................................................. 65
TRISE Register............................................................. 20, 66
TXREG ............................................................................. 139
TXREG Register ................................................................. 19
TXSTA Register.......................................................... 20, 145
BRGH Bit .................................................................. 147
U
UA..................................................................................... 177
Update Address bit, UA .................................................... 177
USART
Synchronous Master Mode
Requirements, Synchronous Receive .............. 223
Requirements, Synchronous Transmission...... 222
Timing Diagram, Synchronous Receive ........... 223
Timing Diagram, Synchronous Transmission... 222
V
VREF. SEE ADC Reference Voltage
W
Wake-up Using Interrupts ................................................. 184
Watchdog Timer (WDT)...................................................... 31
Clock Source .............................................................. 31
Modes......................................................................... 32
Period ......................................................................... 31
Specifications ........................................................... 218
WCOL bit .................................................................. 164, 176
WPUB Register................................................................... 56
Write Collision Detect bit (WCOL) ............................ 164, 176
WWW Address ................................................................. 281
WWW, On-Line Support ....................................................... 9
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Preliminary
DS41418A-page 279