PIC16F707 Datasheet, PDF (32/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
3.4.2 WDT CONTROL
The WDTE bit is located in the Configuration Word
Register 1. When set, the WDT runs continuously.
The PSA and PS<2:0> bits of the OPTION register
control the WDT period. See Section 12.0 “Timer0
Module” for more information.
FIGURE 3-3:
WATCHDOG TIMER BLOCK DIAGRAM
TxGSS = 11
TMRxGE
WDTE
From TMR0
Clock Source
Low-Power
WDT OSC
0
Divide by
512
1
PSA
TABLE 3-3: WDT STATUS
Conditions
WDTE = 0
CLRWDT Command
Exit Sleep + System Clock = EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Postscaler
8
0
1
To TxG
WDTE
PS<2:0>
TO TMR0
WDT Reset
WDT
Cleared
Cleared until the end of OST
DS41418A-page 32
Preliminary
 2010 Microchip Technology Inc.