PIC16F707 Datasheet, PDF (22/284 Pages) Microchip Technology – 40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch™ Technology

PIC16F707/PIC16LF707
TABLE 2-2: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other
resets
Bank 3
180h^{( 2)} INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx xxxx xxxx
181h
OPTION_REG RBPU INTEDG TMR0CS TMR0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
182h^{( 2)}
PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
183h^{( 2)} STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
184h^{( 2)}
FSR
Indirect Data Memory Address Pointer
xxxx xxxx uuuu uuuu
185h
ANSELA
ANSA7 ANSA6 ANSA5 ANSA4
ANSA3
ANSA2
ANSA1 ANSA0 1111 1111 1111 1111
186h
ANSELB
ANSB7 ANSB6 ANSB5 ANSB4
ANSB3
ANSB2
ANSB1 ANSB0 1111 1111 1111 1111
187h
ANSELC
ANSC7 ANSC6 ANSC5
—
—
ANSC2
ANSC1 ANSC0 111- -111 111- -111
188h
ANSELD
ANSD7 ANSD6 ANSD5 ANSD4
ANSD3
ANSD2
ANSD1 ANSD0 1111 1111 1111 1111
189h
18Ah^{( 1),(2)}
18Bh^{( 2)}
ANSELE
PCLATH
INTCON
—
—
—
—
—
ANSE2
ANSE1 ANSE0 ---- -111 ---- -111
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
---0 0000 ---0 0000
GIE
PEIE
TMR0IE
INTE
RBIE
TMR0IF
INTF
RBIF 0000 000x 0000 000u
18Ch
PMCON1
—
—
—
—
—
—
—
RD
1--- ---0 1--- ---0
18Dh
—
Reserved
—
—
18Eh
—
Reserved
—
—
18Fh
—
Reserved
—
—
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the
upper byte of the program counter.
These registers can be addressed from any bank.
Accessible only when SSPM<3:0> = 1001.
DS41418A-page 22
Preliminary
 2010 Microchip Technology Inc.