RG82845SL5YQ Datasheet, PDF (99/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR

System Address Map
R
4.1.1
VGA and MDA Memory Space
Video cards use these legacy address ranges to map a frame buffer or a character-based video
buffer. The address ranges in this memory space are:
• VGAA 0_000A_0000 to 0_000A_FFFF
• MDA
0_000B_0000 to 0_000B_7FFF
• VGAB
0_000B_8000 to 0_000B_FFFF
By default, accesses to these ranges are forwarded to the hub interface. However, if the VGA_EN1
bit is set in the BCTRL1 configuration register, transactions within the VGA and MDA spaces are
sent to AGP. If the MCHCFG.MDAP configuration bit is set, accesses that fall within the MDA
range are sent to the hub interface independent of the setting of the VGA_EN1 bit.
If the MCHCFG.MDAP configuration bit is set, accesses in the MDA range are sent to the hub
interface, independent of the setting of the VGA_EN1 bit. Legacy support requires the ability to
have a second graphics controller (monochrome) in the system. In an 845 chipset system, accesses
in the standard VGA range are forwarded to AGP. Since the monochrome adapter may be on the
hub interface or (or ISA) bus, the MCH must decode cycles in the MDA range and forward them
to the hub interface. This capability is controlled by a configuration bit (MCHCFG.MDAP). In
addition to the memory range B0000h to B7FFFh, the MCH decodes I/O cycles at 3B4h, 3B5h,
3B8h, 3B9h, 3BAh, and 3BFh and forwards them to the hub interface.
An optimization allows the system to reclaim the memory displaced by these regions. If SMM
memory space is enabled by SMRAM.G_SMRARE and either the SMRAM.D_OPEN bit is set or
the system bus receives an SMM-encoded request for code (not data), then the transaction is
steered to system memory rather than the hub interface. Under these conditions, the VGA_EN1 bit
and the MDAP bit are ignored.
Intel^® 82845 MCH for SDR Datasheet
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