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RG82845SL5YQ Datasheet, PDF (9/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR
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Intel® 82845 MCH Features
! Intel® Pentium® 4 Processor (478 pin package)
Support
 Enhanced Mode Scaleable Bus Protocol
 2x Address, 4x Data
 System Bus interrupt delivery
! Accelerated Graphics Port (AGP) Interface
 Supports a single AGP device (either a
connector or on the motherboard)
 Supports AGP 2.0 including 1x, 2x, and 4x
AGP data transfers and 2x/4x Fast Write
 400 MHz system bus
protocol
 System Bus Dynamic Bus Inversion (DBI)
 Supports only 1.5 V AGP electrical
 32-bit system bus addressing
characteristics
 12 deep In-Order Queue
 32 deep AGP request queue
 AGTL+ bus driver technology with
 Delayed transaction support for AGP-to-
integrated AGTL+ termination resistors
System Memory FRAME# semantic reads
! System Memory Support
! System Interrupt Support
 Directly supports one SDR SDRAM
 System bus interrupt delivery mechanism
channel, 64 bits wide (72 bits with ECC)
 Interrupts signaled as upstream memory
 133 MHz Single Data Rate (SDR) SDRAM
writes from AGP/PCI
devices
 Supports peer MSI between hub interface
 64 Mb, 128 Mb, 256 Mb and 512 Mb
and AGP
technologies for x8 and x16 devices
 Provides redirection for IPI and upstream
 By using 64 Mb technology, the smallest
interrupts to the system bus
memory capacity possible is 32 MB
! Power Management
 Configurable optional ECC operation (single  SMRAM space remapping to A0000h
bit Error Correction and multiple bit Error
Detection)
 Supports extended SMRAM space above
256 MB, additional TSEG from Top of
 Page sizes of 2 KB, 4 KB, 8 KB and 16 KB
Memory
(individually selected for every row)
 Thermal management
 SMRAM accesses from AGP or hub
interface are not supported
 Maximum of 3 Double-Sided DIMMs (6
 PC ’99 suspend to DRAM support
rows populated) with unbuffered PC133
(with or without ECC)
 ACPI, Revision 1.0b compliant power
management
Note: Mixed mode, populating ECC and
 APM, Revision 1.2 compliant power
Non-ECC Memories simultaneously is not
management
supported.
 NT Hardware Design Guide, Version 1.0
 3 GB Maximum using 512 Mb technology
compliant
 Supports up to 24 simultaneous open pages ! Package
 Maximum memory bandwidth of 1.067 GB/s  MCH: 593 pin FC-BGA (37.5 x 37.5 mm)
with PC133
! Hub Interface to Intel® 82801BA ICH2
 266 MB/s point-to-point hub interface to
ICH2
 66 MHz base clock
 MSI interrupt messages, power management
state change, SMI, SCI and SERR error
indication
Intel® 82845 MCH for SDR Datasheet
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