RG82845SL5YQ Datasheet, PDF (42/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR

Register Description
R
3.4.6
RCVENSTR—Strength Control Register (RCVENOUT
Signal Group)
Memory Address Offset:
Default Value:
Access:
Size:
34h
00h
R/W
8 bits
This register controls the drive strength of the I/O buffers for the Receive Enable Out signal group
(RDCLKO# signal).
Bit
Descriptions
7:3
Reserved.
2:0
Receive Enable Out Signal Group (RCVEnOut) Strength Control. This field selects the
signal drive strength.
000 = 0.75 X (default)
001 = 1.00 X
010 = 1.25 X
011 = 1.50 X
100 = 2.00 X
101 = 2.50 X
110 = 3.00 X
111 = 4.00 X
42
Intel^® 82845 MCH for SDR Datasheet