RG82845SL5YQ Datasheet, PDF (29/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR

Signal Description
R
2.6
Voltage Reference and Power Signals
Signal Name
Type
Description
HVREF
SDREF
HI_REF
AGPREF
HLRCOMP
GRCOMP
HRCOMP[1:0]
HSWNG[1:0]
SMRCOMP
VCC1_5
VCC1_8
VCCSM
VCCA[1:0]
VTT
VSS
VSSA[1:0]
Ref
Ref
Ref
Ref
I/O
CMOS
I/O
CMOS
I/O
CMOS
I
CMOS
I/O
CMOS
Host Reference Voltage: Reference voltage input for the data, address,
and common clock signals of the host AGTL+ interface.
SDRAM Reference Voltage: Reference voltage input for DQ, DQS,
RDCLKIN (SDR).
Hub Interface Reference: Reference voltage input for the hub interface.
AGP Reference: Reference voltage input for the AGP interface.
Compensation for Hub Interface: This signal is used to calibrate the
hub interface I/O buffers. It is connected to a 40.2 Ω pull-up resistor with
1% tolerance and is pulled up to VCC1_8.
Compensation for AGP: This signal is used to calibrate buffers. It is
connected to a 40.2 Ω pull-down resistor with a 1% tolerance.
Compensation for Host: These signals are used to calibrate the host
AGTL+ I/O buffers. Each signal is connected to a 24.9 Ω pull-down
resistor with a 1% tolerance.
Host Reference Voltage: Reference voltage input for the compensation
logic.
System Memory RCOMP:
1.5 V Power Input: These pins are connected to a 1.5 V power source.
1.8 V Power Input Pins: These pins are connected to a 1.8 V power
source.
SDRAM Power Input Pins: These pins are connected to a 3.3 V power
source for SDR.
PLL Power Input Pins: These pins provide power for the PLL.
AGTL+ Bus Termination Voltage Inputs: These pins provide the
AGTL+ bus termination.
Ground: The VSS pins are the ground pins for the MCH.
PLL Ground: The VSSA[1:0] pins are the ground pins for the PLL on
the MCH.
Intel^® 82845 MCH for SDR Datasheet
29