RG82845SL5YQ Datasheet, PDF (12/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR

Introduction
R
Term
GART
GTLB
UP
DBI
MSI
IPI
SDR
Description
Graphics Aperture Re-map Table. This table contains the page re-map information used
during AGP aperture address translations.
Graphics Translation Look-aside Buffer. A cache used to store frequently used GART
entries.
Uni-Processor.
Dynamic Bus inversion.
Message Signaled Interrupts. MSIs allow a device to request interrupt service via a
standard memory write transaction instead of through a hardware signal.
Inter Processor Interrupt.
Single Data-Rate SDRAM memory.
Table 2. Data Type Notation
Data Type
bit (b)
byte
word
DWord (DW)
QWord (QW)
DQWord (DQW)
Kilobyte (KB)
Megabit (Mb)
Megabyte (MB)
Gigabit (Gb)
Gigabyte (GB)
Size
Smallest unit, 0 or 1
8 bits
16 bits = 2 bytes
Doubleword: 32 bits = 4 bytes
Quadword: 8 bytes = 4 words
Double Quadword. 16 bytes or 8 words. This is sometimes
referred to as a Superword (SW or SWord), and is also
referred to as a “Cache Line”.
1024 bytes
1, 048,576 bits = 128 KB
1,048,576 bytes = 1024 KB
1024 Mb
1024 MB
Table 3. Number Format Notation
Number Format
Decimal (default)
Binary
Hex
Notation
b
h
Example
14
1110b
0Eh
12
Intel^® 82845 MCH for SDR Datasheet