RG82845SL5YQ Datasheet, PDF (65/148 Pages) Intel Corporation – Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR

Register Description
R
3.5.25
ACAPID—AGP Capability Identifier Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
A0–A3h
0020_0002h
RO
32 bits
This register provides standard identifier for AGP capability.
Bit
31:24
23:20
19:16
15:8
7:0
Description
Reserved.
Major AGP Revision Number (MAJREV). These bits provide a major revision number of AGP
specification that this version of the MCH conforms. This field is hardwired to value of “0010b”
(i.e., implying Rev 2.x).
Minor AGP Revision Number (MINREV). These bits provide a minor revision number of AGP
specification that this version of the MCH conforms. This number is hardwired to value of “0000”
(i.e., implying Rev x.0)
Together with the major revision number this field identifies MCH as an AGP Revision 2.0
compliant device.
Next Capability Pointer (NCAPTR). AGP capability is the first and the last capability described
via the capability pointer mechanism; therefore, these bits are hardwired to 0h to indicate the
end of the capability linked list.
AGP Capability ID (CAPID). This field identifies the linked list item as containing AGP
registers. This field has a value of 0000_0010b assigned by the PCI SIG.
Intel^® 82845 MCH for SDR Datasheet
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