HD64F3670 Datasheet, PDF (97/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Section 7 ROM
The features of the 20-kbyte (4 kbytes of them are the EIOT control program area) flash memory
built into HD64F3672 are summarized below.
• Programming/erase methods
 The flash memory is programmed 128 bytes at a time. Erase is performed in single-block
units. The flash memory is configured as follows: 1 kbyte × 4 blocks, 16 kbytes × 1 block.
To erase the entire flash memory, each block must be erased in turn.
• Reprogramming capability
 The flash memory can be reprogrammed up to 100 times.
• On-board programming
 On-board programming/erasing can be done in boot mode, in which the boot program built
into the chip is started to erase or program of the entire flash memory. In normal user
program mode, individual blocks can be erased or programmed.
• Automatic bit rate adjustment
 For data transfer in boot mode, this LSI's bit rate can be automatically adjusted to match
the transfer bit rate of the host.
• Programming/erasing protection
 Sets software protection against flash memory programming/erasing.
• Power-down mode
 The power supply circuit is partly halted in the subactive mode and can be read in the
power-down mode.
7.1 Block Configuration
Figure 7-1 shows the block configuration of 16-kbyte flash memory. The thick lines indicate
erasing units, the narrow lines indicate programming units, and the values are addresses. The
flash memory is divided into 1 kbyte × 4 blocks and 16 kbytes × 1 block. Erasing is performed in
these units. Programming is performed in 128-byte units starting from an address with lower eight
bits H'00 or H'80.
Rev. 1.0, 03/01, page 73 of 280