HD64F3670 Datasheet, PDF (174/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

12.2.1 Timer Control/Status Register WD(TCSRWD)
TCSRWD is a register that indicates TCSRWD and TCWD write control, watchdog timer
operation control, and the operation status.
Bit Bit Name Initial Value R/W
7 B6WI
1
R
6 TCWE
0
R/W
5 B4WI
1
R
4 TCSRWE 0
R/W
3 B2WI
1
R
2 WDON 0
R/W
1 B0WI
1
R
Description
Bit 6 Write Inhibit
The TCWE bit can be written only when the write value of
the B6WI bit is 0.
This bit is always read as 1.
Timer Counter WD Write Enable
TCWD can be written when the TCWE bit is set to 1.
When writing data to this bit, the value for bit 7 must be 0.
Bit 4 Write Inhibit
The TCSRWE bit can be written only when the write value
of the B4WI bit is 0. This bit is always read as 1.
Timer Control/Status Register W Write Enable
The WDON and WRST bits can be written when the
TCSRWE bit is set to 1.
When writing data to this bit, the value for bit 5 must be 0.
Bit 2 Write Inhibit
This bit can be written to the WDON bit only when the write
value of the B2WI bit is 0.
This bit is always read as 1.
Watchdog Timer On
TCWD starts counting up when WDON is set to 1 and halts
when WDON is cleared to 0.
[Setting condition]
When 0 is written to the WDON bit while writing 0 to the
B2WI bit when the TCSRWE bit=1
[Clearing condition]
• Reset by RES pin
• When 0 is written to the WDON bit while writing 0 to the
B2WI when the TCSRWE bit=1
Bit 0 Write Inhibit
This bit can be written to the WRST bit only when the write
value of the B0WI bit is 0. This bit is always read as 0. This
bit is always read as 1.
Rev. 1.0, 03/01, page 150 of 280