HD64F3670 Datasheet, PDF (63/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Prior to executing BCLR
Input/output
Pin state
PCR5
PDR5
P57
Input
Low
level
0
1
P56
Input
High
level
0
0
P55
Output
Low
level
1
0
P54
Output
Low
level
1
0
P53
Output
Low
level
1
0
P52
Output
Low
level
1
0
P51
Output
Low
level
1
0
P50
Output
Low
level
1
0
BCLR instruction executed
BCLR #0, @PCR5
The BCLR instruction is executed for PCR5.
After executing BCLR
Input/output
Pin state
PCR5
PDR5
P57
Output
Low
level
1
1
P56
Output
High
level
1
0
P55
Output
Low
level
1
0
P54
Output
Low
level
1
0
P53
Output
Low
level
1
0
P52
Output
Low
level
1
0
P51
Output
Low
level
1
0
P50
Input
High
level
0
0
Description on operation
When the BCLR instruction is executed, first the CPU reads PCR5. Since PCR5 is a write-only
register, the CPU reads a value of H'FF, even though the PCR5 value is actually H'3F.
Next, the CPU clears bit 0 in the read data to 0, changing the data to H'FE.
Finally, H'FE is written to PCR5 and BCLR instruction execution ends.
As a result of this operation, bit 0 in PCR5 becomes 0, making P50 an input port. However, bits 7
and 6 in PCR5 change to 1, so that P57 and P56 change from input pins to output pins. To prevent
this problem, store a copy of the PCR5 data in a work area in memory and manipulate data of the
bit in the work area, then write this data to PCR5.
Rev. 1.0, 03/01, page 39 of 280