HD64F3670 Datasheet, PDF (21/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Tables of Contents
Section 1 Overview
Table 1-1 Pin Functions..................................................................................................................5
Section 2 CPU
Table 2-1 Operation Notation .......................................................................................................16
Table 2-2 Data Transfer Instructions ............................................................................................17
Table 2-3 Arithmetic Operations Instructions (1).........................................................................18
Table 2-3 Arithmetic Operations Instructions (2).........................................................................19
Table 2-4 Logic Operations Instructions ...................................................................................... 20
Table 2-5 Shift Instructions ..........................................................................................................20
Table 2-6 Bit Manipulation Instructions (1) .................................................................................21
Table 2-6 Bit Manipulation Instructions (2) .................................................................................22
Table 2-7 Branch Instructions.......................................................................................................23
Table 2-8 System Control Instructions .........................................................................................24
Table 2-9 Block Data Transfer Instructions..................................................................................25
Table 2-10 Addressing Modes ......................................................................................................27
Table 2-11 Absolute Address Access Ranges...............................................................................28
Table 2-12 Effective Address Calculation (1) ..............................................................................30
Table 2-12 Effective Address Calculation (2) ..............................................................................31
Section 3 Exception Handling
Table 3-1 Exception Sources and Vector Address........................................................................42
Table 3-2 Interrupt Wait States.....................................................................................................51
Section 4 Address Break
Table 4-1 Access and Data Bus Used ...........................................................................................57
Section 5 Clock Pulse Generators
Table 5-1 Crystal Oscillator Parameters .......................................................................................62
Section 6 Power-down Modes
Table 6-1 Operating Frequency and Waiting Time ......................................................................66
Table 6-2 Transition Mode after the SLEEP Instruction Execution and Interrupt Handling........70
Table 6-3 Internal State in Each Operating Mode ........................................................................70
Section 7 ROM
Table 7-1 Setting Programming Modes ........................................................................................77
Table 7-2 Boot Mode Operation ...................................................................................................79
Rev. 1.0, 03/01, page xxi of xxiv