HD64F3670 Datasheet, PDF (206/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Start transmission/reception
[1] Read SSR and check that the TDRE
flag is set to 1, then write transmit
data to TDR.
Read TDRE flag in SSR
[1]
When data is written to TDR, the
TDRE flag is automatically cleared to
No
TDRE = 1
0.
[2] Read SSR and check that the RDRF
flag is set to 1, then read the receive
data in RDR.
Yes
When data is read from RDR, the
Write transmit data to TDR
RDRF flag is automatically cleared to
0.
[3] To continue serial transmission/
reception, before the MSB (bit 7) of
the current frame is received, finish
Read ORER flag in SSR
reading the RDRF flag, reading RDR.
Also, before the MSB (bit 7) of the
OER = 1
No
Yes
[4]
Error processing
current frame is transmitted, read 1
from the TDRE flag to confirm that
writing is possible. Then write data to
TDR.
When data is written to TDR, the
TDRE flag is automatically cleared to
Read RDRF flag in SSR
[2]
0. When data is read from RDR, the
RDRF flag is automatically cleared to
0.
No
RDRF = 1
[4] Receive error processing:
If an overrun error occurs, read the
OER flag in SSR, and after
Yes
performing the appropriate error
processing, clear the OER flag to 0.
Read receive data in RDR
Transmission/reception cannot be
resumed if the OER flag is set to 1.
For overrun error processing, see
figure 13-13.
Yes
All data received?
[3]
No
Clear TE and RE bits in SCR to 0
<End>
Figure 13-14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode)
Rev. 1.0, 03/01, page 182 of 280