HD64F3670 Datasheet, PDF (85/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Section 5 Clock Pulse Generators
Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including a system
clock pulse generator. The system clock pulse generator consists of a system clock oscillator, a
duty correction circuit, and system clock dividers.
Figure 5-1 shows a block diagram of the clock pulse generators.
OSC₁
OSC₂
System
clock
oscillator
ø_OSC
(f_OSC)
Duty
correction
circuit
ø_OSC
(f_OSC)
System clock pulse generator
System
clock
divider
ø_OSC
ø_OSC/8
ø_OSC/16
ø_OSC/32
ø_OSC/64
ø
Prescaler S
(13 bits)
ø/2
to
ø/8192
Figure 5-1 Block Diagram of Clock Pulse Generators
The basic clock signals that drive the CPU and on-chip peripheral modules are ø.
The system clock is divided into ø/8192 to ø/2 by prescaler S and they are supplied to respective
peripheral modules.
5.1 System Clock Generator
Clock pulses can be supplied to the system clock divider either by connecting a crystal or ceramic
oscillator, or by providing external clock input.
5.1.1 Connecting a Crystal Oscillator
Figure 5-2 shows a typical method of connecting a crystal oscillator. An AT-cut parallel-
resonance crystal resonator should be used. Figure 5-3 shows the equivalent circuit of a crystal
oscillator. An oscillator having the characteristics given in table 5-1 should be used.
OSC ₁
OSC ₂
C₁
C₂
C₁ = C₂ = 12 pF ±20%
Figure 5-2 Typical Connection to Crystal Oscillator
Rev. 1.0, 03/01, page 61 of 280