HD64F3670 Datasheet, PDF (192/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

13.4.1 Clock
Either an internal clock generated by the on-chip baud rate generator or an external clock input at
the SCK3 pin can be selected as the SCI3’s serial clock, according to the setting of the COM bit in
SMR and the CKE0 and CKE1 bits in SCR3. When an external clock is input at the SCK3 pin, the
clock frequency should be 16 times the bit rate used.
When the SCI3 is operated on an internal clock, the clock can be output from the SCK3 pin. The
frequency of the clock output in this case is equal to the bit rate, and the phase is such that the
rising edge of the clock is in the middle of the transmit data, as shown in figure 13-3.
Clock
Serial data
0 D0 D1 D2 D3 D4 D5 D6 D7 0/1 1 1
1 frame
Figure 13-3 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode)(Example with 8-Bit Data, Parity, Two Stop Bits)
Rev. 1.0, 03/01, page 168 of 280