HD64F3670 Datasheet, PDF (40/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

2.4 Instruction Set
2.4.1 Table of Instructions Classified by Function
The H8/300H CPU has 62 instructions. Tables 2-2 to 2-9 summarizes the instructions in each
functional category. The notation used in tables 2-2 to 2-9 is defined below.
Table 2-1 Operation Notation
Symbol
Description
Rd
General register (destination)*
Rs
General register (source)*
Rn
General register*
ERn
General register (32-bit register or address register)
(EAd)
Destination operand
(EAs)
Source operand
CCR
Condition-code register
N
N (negative) flag in CCR
Z
Z (zero) flag in CCR
V
V (overflow) flag in CCR
C
C (carry) flag in CCR
PC
Program counter
SP
Stack pointer
#IMM
Immediate data
disp
Displacement
+
Addition
–
Subtraction
×
Multiplication
÷
Division
∧
Logical AND
∨
Logical OR
⊕
Logical XOR
→
Move
¬
NOT (logical complement)
:3/:8/:16/:24
3-, 8-, 16-, or 24-bit length
Note: * General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0 to
R7, E0 to E7), and 32-bit registers/address registers (ER0 to ER7).
Rev. 1.0, 03/01, page 16 of 280