HD64F3670 Datasheet, PDF (8/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

3.4.1 External Interrupts ................................................................................................... 48
3.4.2 Internal Interrupts .................................................................................................... 49
3.4.3 Interrupt Handling Sequence ................................................................................... 49
3.4.4 Interrupt Response Time.......................................................................................... 51
3.5 Usage Notes ...................................................................................................................... 53
3.5.1 Interrupts after Reset................................................................................................ 53
3.5.2 Notes on Stack Area Use ......................................................................................... 53
3.5.3 Notes on Rewriting Port Mode Registers ................................................................ 53
Section 4 Address Break....................................................................................55
4.1 Register Descriptions ........................................................................................................ 55
4.1.1 Address Break Control Register(ABRKCR) ........................................................... 56
4.1.2 Address Break Status Register(ABRKSR) .............................................................. 57
4.1.3 Break Address Registers (BARH, BARL)............................................................... 57
4.1.4 Break Data Registers (BDRH, BDRL) .................................................................... 58
4.2 Operation .......................................................................................................................... 58
Section 5 Clock Pulse Generators .....................................................................61
5.1 System Clock Generator ................................................................................................... 61
5.1.1 Connecting a Crystal Oscillator ............................................................................... 61
5.1.2 Connecting a Ceramic Oscillator ............................................................................. 62
5.1.3 External Clock Input Method................................................................................... 62
5.2 Prescalers .......................................................................................................................... 63
5.2.1 Prescaler S ............................................................................................................... 63
5.3 Usage Notes ...................................................................................................................... 63
5.3.1 Note on Oscillators .................................................................................................. 63
5.3.2 Notes on Board Design ............................................................................................ 64
Section 6 Power-down Modes...........................................................................65
6.1 Register Descriptions ........................................................................................................ 65
6.1.1 System Control Register 1(SYSCR1) ...................................................................... 65
6.1.2 System Control Register 2(SYSCR2) ...................................................................... 66
6.1.3 Module Standby Control Register 1(MSTCR1) ...................................................... 67
6.1.4 Module Standby Control Register 2(MSTCR2) ...................................................... 68
6.2 Mode Transitions and States of the LSI ............................................................................ 69
6.2.1 Sleep Mode .............................................................................................................. 71
6.2.2 Standby Mode.......................................................................................................... 71
6.2.3 Subsleep Mode......................................................................................................... 71
6.3 Operating Frequency in the Active Mode ......................................................................... 72
6.4 Direct Transition ............................................................................................................... 72
6.5 Module Standby Function................................................................................................. 72
Section 7 ROM ..................................................................................................73
Rev. 2.0, 03/01, page viii of xxiv