HD64F3670 Datasheet, PDF (211/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Start reception
Read MPIE bit in SCR3
[1]
Read OER and FER flags in SSR
[2]
Yes
FER+OER = 1
No
Read RDRF flag in SSR
[3]
No
RDRF = 1
Yes
Read receive data in RDR
No
This station’s ID?
Yes
Read OER and FER flags in SSR
Yes
FER+OER=1
[1] Set the MPIE bit in SCR to 1.
[2] Read OER and FER in SSR to check for
errors. Receive error processing is performed
in cases where a receive error occurs.
[3] Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again, and clear the RDRF flag to 0.
When data is read from RDR, the RDRF flag
is automatically cleared to 0.
[4] SCI status check and data reception:
Read SSR and check that the RDRF flag is
set to 1, then read the data in RDR.
[5] If a receive error occurs, read the OER and
FER flags in SSR to identify the error. After
performing the appropriate error processing,
ensure that the OER and FER flags are all
cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RxD pin value.
No
Read RDRF flag in SSR
[4]
No
RDRF = 1
Yes
Read receive data in RDR
Yes
All data received?
[5]
Error processing
No
(Continued on
[A]
next page)
Clear RE bit in SCR3 to 0
<End>
Figure 13-17 Sample Multiprocessor Serial Reception Flowchart (1)
Rev. 1.0, 03/01, page 187 of 280